In relation to a PWM inverter which outputs an arbitrary sinusoidal voltage by means of activation/deactivation of an IGBT or the like, there are proposed some signal generating methods for a PWM pulse signal which can serve as a command to activate/deactivate an IGBT or the like. One is a method such as illustrated in FIG. 5, where a PWM pulse signal is generated upon comparison between output voltage commands and a triangular wave (carrier wave) (a triangular wave comparison PWM method), and another is a method where a desired PWM pulse signal is generated by composition of vectors in accordance with a space vector concept (a space vector PWM method). A maximum line voltage (amplitude value) which can be output under the triangular-comparison method using output voltage commands of sinusoidal wave is generally limited to √3/2 times a direct current bus voltage of the PWM inverter.
However, a maximum line voltage (amplitude value) which can be output under the space vector PWM method coincides with a direct current bus voltage of the PWM inverter. In both of these methods, a maximum output line voltage assumes a sinusoidal waveform.
However, some applications require a larger output voltage, wherein a line output voltage does not necessarily assume a sinusoidal waveform.
A first related art example includes a method for outputting a six-step voltage (a(1) through a(3), and b(1) through b(3) in FIG. 6) positioned at vertexes of a hexagon shown in FIG. 6 when an output voltage exceeds a maximum voltage that can be attained with a sinusoidal voltage.
A second related art example is described in, for example, JP-A-10-257782, and is illustrated in FIG. 7. In FIG. 7, 101 denotes a PWM pattern generating section, 104 a voltage-command-limiting-value switching section, 102 first voltage command limiting means, 103 second voltage command limiting means, and 105 a mode determination section. |V1| is a voltage amplitude command after correction, θ11* is a voltage phase command after correction, and MODE 1 is an output-mode switching signal. The mode determination section 105 always outputs HI when |V1| is lower than Vmax. At this time, the voltage-command-limiting switching section 104 selects the first voltage command limiting means 102. Further, the mode determination section 105 always outputs LO when the mode 1 is LO and |V1| is Vmax or larger. At this time, the voltage-command-limiting switching section 104 selects the second voltage command limiting means 103. In step 2, |V1| and θ1 are input to the first voltage command limiting means 102 or the second voltage command limiting means 103, whereby |V1|″ and θ11* are output as corrected values of the voltage amplitude command and the voltage phase command, respectively. These signals |V1|′, θ11*, and θ1 are input to the PWM pattern generating section 101, thereby generating an appropriate PWM pattern. Further, in FIG. 9, Tu represents a rise (fall) time of a U-phase PWM signal, Tv represents a rise (fall) time of a V-phase PWM signal, and Tw represents a rise (fall) time of a W-phase PWM signal. The symbol “/” prefixed on the respective phase signals indicates a signal which is the negative of the prefixed signal.
An operation of the second voltage command limiting means will be described by reference to the drawings. FIG. 8 is a flow chart showing a control procedure of an embodiment. In FIG. 8, when “MODE 1=0” holds in step 3 or “|V1|<Vmax” holds in step 4, the first voltage command limiting means 102 is selected; when neither “MODE 1=0” nor “|V1|<Vmax” holds, the second voltage command limiting means 103 is selected. When the second voltage command limiting means 103 is selected, |V1| which has been captured in step 5 is compared with 2/√3·Vmax. 2/√3·Vmax is an output voltage at a vertex of the hexagon in FIG. 3, and can be output only when the voltage phase command is 0, 60, 120, 180, 240, 300, or 360. When “|V1|≧2/√3·Vmax” holds, “|V1|′=2/√3·Vmax” is set in step 6. In all other cases, “|V1|′=|V1|” is set. Next, in step 7, the captured θ1 is converted to a value ranging from 0 to 60 degrees on the basis of a table shown in FIG. 9, and the value is set as θ11.
Next, when “θ11≦30°” holds in step 8, θ11* is determined in step 9 from “θ11*=COS−(Vmax/|V1|)−30°”. In an analogous manner, when “θ11>30°” holds, θ11* is determined from “θ11*=COS−(Vmax/|V1|)−30°, and in both cases processing further proceeds to step 15. Next, also in the case where the first voltage command limiting means 102 is selected (“MODE 1=0” in step 3) or the second voltage command limiting means 103 is selected, when |V1| is determined to be smaller than Vmax in step 4, operations during steps 11 to 14 are performed in an analogous manner to the previous steps 5 to 8, thereby reaching step 15. In step 15, t0, t1 and t2 are calculated on the basis of the corrected voltage amplitude command |V1| and the corrected voltage phase command θ11*. In step 16, switching between DOWN mode and UP mode is effected. In steps 17 and 18, DOWN mode or UP mode is detected, thereby setting T0, T1, and T2. In step 19, T0, T1, and T2 are set to TU, TV, and TW with reference to θ1 on the basis of the table shown in FIG. 9. In step 20, TU, TV, and TW are output.
As described above, a line voltage exceeding a direct current bus voltage of the PWM inverter can be output; simultaneously, an intermediate state ranging from a sinusoidal output to an output of six-step voltage (rectangular output) is developed, thereby enabling a smooth transition.
However, as the first related art, an intermediate voltage during a transition from a sinusoidal voltage output to a six-step voltage output cannot be obtained; as a result, there arise problems such that smooth switching between modes is difficult, and that a control characteristic in a current control system, where a current control function is required, becomes unstable during a transitory period of switching.
Further, as the second related art, it has a problem that smooth transition switching to a six-step voltage output requires complicated processing including determination of switching, limitation on lengths of command voltage vectors, or correction of angles of vectors by calculating an arcsine and by reference to a table which stores lengths of vectors and corresponding angles.
The present invention has been conceived to solve the above problems and to provide a PWM inverter which enables smooth mode switching during transition from a sinusoidal voltage output to a six-step voltage output, and which can provide smooth mode switching by means of simple control processing.